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STANDARD
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6.1 Outline
Only the instruction register (IR) and data register (DR) of the VFD controller can be controlled by the
user's MPU. Before starting the internal operation of the controller, control information is temporarily
stored into these registers to allow interfacing with various MPUs, which operate at different speeds, or
various peripheral control devices. The internal operation of the controller is determined by signals sent
from the MPU. These signals, which include register selection signal (RS), read/write signal (R/W), and
the data bus (DB0 to DB7), make up the controller instructions (See Table-13). There are four categories
of instructions that:
designate controller functions, such as display format, data length, ect.
Set internal RAM addresses
Perform data transfer with internal RAM
Perform miscellaneous functions
Normally instructions that perform data transfer with interval RAM are used the m
ost.
However, auto-increment by 1 (or auto-decrement by 1) of internal RAM addresses after each data write
can lighten the program load of the MPU. Since the display shift instruction can perform concurrently
with display data write, the user can minimize system development time with maximum programming
efficiency
When an instruction is being executed for internal operation, no instruction other than the busy
flag/address read instruction can be executed. Because the busy flag is set to 1 while an instruction is
being executed, check it to make sure it is 0 before sending another instruction from the MPU.
NoteBe sure the controller is not in the busy state (BF=0) before sending an instruction from the MPU to the
nodule. If an instruction is sent without checking the busy flag, the time between the first instruction
and next instruction will take much longer than the instruction time itself.
Refer to Table-13 for the list of each instruction execution time.
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